FPGA Implementation of RSA Encryption Algorithm for E-passport Application | ||
The International Conference on Electrical Engineering | ||
Article 9, Volume 9, 9th International Conference on Electrical Engineering ICEENG 2014, May 2014, Pages 1-5 PDF (98.92 K) | ||
Document Type: Original Article | ||
DOI: 10.21608/iceeng.2014.30363 | ||
Authors | ||
Khaled Shehata1; Hanady Hussien1; Sara Yehia2 | ||
1Arab Academy for Science and Technology, Cairo, Egypt. | ||
2Lecturer in the Higher Institute of Engineering, New Cairo, Egypt. | ||
Abstract | ||
Securing the data stored on E-passport is a very important issue. RSA encryption algorithm is suitable for such application with low data size. In this paper the design and implementation of 1024 bit-key RSA encryption and decryption module on an FPGA is presented. The module is verified through comparing the result with that obtained from MATLAB tools. The design runs at a frequency of 36.3 MHz on Virtex-5 Xilinx FPGA. The key size is designed to be 1024-bit to achieve high security for the passport information. The whole design is achieved through VHDL design entry which makes it a portable design and can be directed to any hardware platform. | ||
Keywords | ||
RSA; VHDL; FPGA; modular multiplication; modular exponential | ||
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