DESIGN OF A 10-BIT NON-LINEAR INTERPOLATION DAC | ||
| The International Conference on Electrical Engineering | ||
| Article 15, Volume 5, 5th International Conference on Electrical Engineering ICEENG 2006, May 2006, Pages 1-7 PDF (160.15 K) | ||
| Document Type: Original Article | ||
| DOI: 10.21608/iceeng.2006.33530 | ||
| Authors | ||
| Khaled Shehata1; Saleh M. Eisa2; Hani Fikry3; Tarif Elshafiey4 | ||
| 1Professor, Electronics Departement, AASTMT, Cairo,Egypt. | ||
| 2T.A., Electronics Departement, AASTMT, Cairo,Egypt. | ||
| 3Professor, Electronics Departement, Ain Shams University, Cairo, Egypt. | ||
| 4Dr., Electronics Departement,MSA, Giza, Egypt. | ||
| Abstract | ||
| ABSTRACT This paper presents a novel design for a 10 bit DAC. The design is to be integrated in a direct digital frequency synthesizer (DDFS). The design consists of three main modules, a nonlinear course DAC, a linear fine DAC, and a nonlinear interpolation DAC. Each of these modules contributes in enhancing the DAC performance. The DAC is then integrated, and simulated using Mentor Graphics Tools. The simulation was done using a 3.3V, 0.35u CMOS technology. The design has an advantage over the published DACs in its simplicity and repeatability. The design operates at higher output frequency with considerable spectral purity. | ||
| Keywords | ||
| CMOS; digital-to-analog converter; nonlinear digital-to-analog converter; Interpolation DAC; Direct Digital Frequency Synthesizer | ||
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