Design space exploration of PISA architecture for ONU auto-discovery process
Mady, A., Tonini, A., Finardi, D. (2008). Design space exploration of PISA architecture for ONU auto-discovery process. EKB Journal Management System, 6(6th International Conference on Electrical Engineering ICEENG 2008), 1-9. doi: 10.21608/iceeng.2008.34237
Alie El-Din Mady; Andrea Tonini; Davide Finardi. "Design space exploration of PISA architecture for ONU auto-discovery process". EKB Journal Management System, 6, 6th International Conference on Electrical Engineering ICEENG 2008, 2008, 1-9. doi: 10.21608/iceeng.2008.34237
Mady, A., Tonini, A., Finardi, D. (2008). 'Design space exploration of PISA architecture for ONU auto-discovery process', EKB Journal Management System, 6(6th International Conference on Electrical Engineering ICEENG 2008), pp. 1-9. doi: 10.21608/iceeng.2008.34237
Mady, A., Tonini, A., Finardi, D. Design space exploration of PISA architecture for ONU auto-discovery process. EKB Journal Management System, 2008; 6(6th International Conference on Electrical Engineering ICEENG 2008): 1-9. doi: 10.21608/iceeng.2008.34237

Design space exploration of PISA architecture for ONU auto-discovery process

The International Conference on Electrical Engineering
Article 38, Volume 6, 6th International Conference on Electrical Engineering ICEENG 2008, May 2008, Pages 1-9    PDF (163.75 K)
Document Type: Original Article
DOI: 10.21608/iceeng.2008.34237
Authors
Alie El-Din Mady1; Andrea Tonini2; Davide Finardi3
1ALaRI, Universita della Svizzera italiana, Lugano, Switzerland.
2EMC SA, Bellinzona, Switzerland.
3Etnoteam Spa, Milan, Italy.
Abstract
Abstract:
The goal of the paper is to optimize the PISA architecture for the ONU Auto-discovery
process. This Auto-discovery process has been written in C language following the
IEEE 802.3ah MPCP standard. Using SimpleScalar [3] simulation tool, the architecture
profile is evaluated in order to decide the range of the design exploration. Then, using
Wattch [1] and CACTI [2] simulation tools the CPI, average power consumed and cache
area are calculated for each design point, the cost function is defined and evaluated for
each design point using greedy strategy. The Auto-discovery process has been written in
VHDL and using Synopys power compiler [4] the power consumption has been calculated
and then we compared between the VHDL implementation and the PISA architecture
from the power consumption point of view.
Keywords
Design space exploration; Ethernet Passive Optical Network; Multi-Point Control Protocol; ONU Auto-discovery process
Statistics
Article View: 150
PDF Download: 243