FPGA Implementation of a Direct Digital Synthesizer for Carrier Phase Synchronizer in Software Radio Receiver | ||||
The International Conference on Electrical Engineering | ||||
Article 91, Volume 6, 6th International Conference on Electrical Engineering ICEENG 2008, May 2008, Page 1-9 PDF (263.69 K) | ||||
Document Type: Original Article | ||||
DOI: 10.21608/iceeng.2008.34338 | ||||
![]() | ||||
Authors | ||||
Sherif Welsen Shaker1; Salwa Hussien El Ramly2; Khaled Ali Shehata3 | ||||
1Modern Academy for Engineering and Technology, Cairo, Egypt. | ||||
2College of Engineering, Ain Shams University, Cairo, Egypt. | ||||
3Arab Academy for Engineering and Technology, Cairo, Egypt. | ||||
Abstract | ||||
Abstract: More recently there has been a lot of discussion about the emergence of so-called Software Defined Radio (SDR). Due to its high reconfigurability, Field Programmable Gate Array technology (FPGA) can be viewed as an attractive option for implementing many of the tasks performed in SDR. Synchronization is one of the most complicated signal processing performed in SDR. This paper proposes an all-digital QPSK carrier phase synchronizer that is based on Phase-Locked Loop. The paper proposes the implementation of one of the basic block of the synchronizer which is the Numerically Controlled Oscillator (NCO) based Direct Digital Synthesizer (DDS) on Altera EPF10K70RC240-4 FPGA chip. A comparison between the simulation results and Hardware test of the DDS has been made. The used tools are FPGA Advantage Pro provided by Mentor Graphics and Quartus synthesizer provided by Altera. | ||||
Keywords | ||||
Software defined radio; phase synchronization; FPGA and DDS | ||||
Statistics Article View: 105 PDF Download: 231 |
||||