Keywords = Digital Phase Locked Loop (DPLL)
| Number of Articles: 1 | ||
| 1 | A Power Efficient and Fast Locking CMOS Design of All-Digital Phase-Locked Loop | |
| Volume 42, Issue 1, January 2022, Page 197-203 | ||
| Reham Ibrahim Abdo; Mahmoud abdelghany; Ashraf A. M. Khalaf; Hesham Fathy Aly Hamed | ||
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