Towards Efficient FPGA Implementation of Elliptic Curve Crypto-Processor for Security in IoT and Embedded Devices

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Fig. 8: The scalar multiplication architecture
Table 9: A comparison with state-of-the-art Architecture PM algorithm FF multiplier FPGA Frequency in MHz # of occupied slices Time in s
[23]
Montgomery Ladder
Bit parallel with K-O
Virtex 7
294
3041
4.6
[22]
Segmented pipeline
Virtex 5
113
11777
3.99
[8]
Digit parallel
Virtex 7
351
3107
11.28
This work
Bit parallel
Virtex 6
369.5
19,824
1.9
11 8
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