Design and Implementation of Digital Delay Line Integrator (DDLI) using FPGA and DSP | ||||
The International Conference on Electrical Engineering | ||||
Article 62, Volume 8, 8th International Conference on Electrical Engineering ICEENG 2012, May 2012, Page 1-9 PDF (840.28 K) | ||||
Document Type: Original Article | ||||
DOI: 10.21608/iceeng.2012.30808 | ||||
View on SCiNiTO | ||||
Authors | ||||
Saad M. El gayar; Fathy M. Ahmed; Nabil G. Mikhail | ||||
Abstract | ||||
In the present work, the design and implementation of digital delay line integrator (DDLI) which is a common radar signal processing technique is proposed. The design and implementation is achieved using two of the new developed digital hardware platforms: Digital Signal Processors (DSP) and Field Programmable Gate Arrays (FPGAs). Comparison between these developed digital hardware platforms based on the implemented DDLI is introduced. This is done to find out the aspects of choosing which platform is the best for implementing certain radar signal processing technique. | ||||
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