Ballistic Transport in Gate-All-Around Nanowire Transistors | ||||
| The International Conference on Electrical Engineering | ||||
| Article 54, Volume 7, 7th International Conference on Electrical Engineering ICEENG 2010, May 2010, Page 1-10 PDF (251.02 K) | ||||
| Document Type: Original Article | ||||
| DOI: 10.21608/iceeng.2010.33017 | ||||
 View on SCiNiTO | ||||
| Authors | ||||
| Dalia Selim Louis; S. H. Gamal; W. F. Farouk; O. A. Omar | ||||
| Department of Engineering Physics and Mathematics, Faculty of Engineering, Ain Shams University, Cairo, Egypt. | ||||
| Abstract | ||||
| Abstract: In this paper, we propose a 1D numerical quantum simulator for symmetric gate-allaround nanowire transistors with cylindrical cross section within the effective mass approximation. The simulator is based on a self consistent Schrödinger-Poisson solver, using the finite difference method, in conjunction with a current model assuming ballistic behavior for the transistor. The solutions obtained were first verified analytically when it was available. Electron distribution profiles and I-V characteristics for transistors with different device parameters are numerically evaluated using the proposed simulator. The effects of quantum confinement and low dimensions on these characteristics are indicated. | ||||
| Keywords | ||||
| Gate-All-Around nanowire transistors; self consistent Schrödinger-Poisson solver; finite difference method and Natori’s model | ||||
|
Statistics Article View: 116 PDF Download: 252 |
||||
