Design for Testability of Circuits and Systems; An overview | ||||
| The International Conference on Electrical Engineering | ||||
| Article 27, Volume 5, 5th International Conference on Electrical Engineering ICEENG 2006, May 2006, Page 1-24 PDF (310.24 K) | ||||
| Document Type: Original Article | ||||
| DOI: 10.21608/iceeng.2006.33550 | ||||
 View on SCiNiTO | ||||
| Authors | ||||
| Emad H. Khalil; M. H. El-Mahlawy; Fawzy Ibrahim; M. H. Abdel-Azeem | ||||
| Egyptian Armed Forces. | ||||
| Abstract | ||||
| ABSTRACT Integrated circuits (ICs) are reaching complexity that was hard to imagine. ICs incorporating hundreds of millions of transistors, mega-bit memories, complicated pipelined structures, etc., are in high demand. Obviously, designing such complex circuits poses real challenges to engineers. Certainly, no relief comes from the competitive marketplace, with increasing demands for a very narrow window of time (time-to-market) in engineering a ready product. Therefore, a systematic and well-structured approach to designing ICs to be testable is a must. With the growth in complexity of very large scale integration (VLSI) circuits, test generation for circuits is becoming increasingly difficult and time consuming. Even though the computing power and resources have multiplied dramatically over last few decades, an increasing number of memory elements in VLSI circuits require more effective and powerful sequential test generators. This paper is represented to review concepts and techniques for testing electronic circuits and systems as part of a lecture review. This covers various testing and design-for-test (DFT) techniques starting from (Automatic Test Equipment) ATE basics (definition, construction and types). Exploring testing strategies for digital combinational and sequential circuits, and introduces a comparative study between the common fault models. Finally the paper ends with design for testability guiding rules and possible challenges and difficulties that need development and research in the testing problem. | ||||
| Keywords | ||||
| Design-for-test (DFT); Automatic Test Equipment; Testing of electronic circuits | ||||
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