Efficient Uses of FPGAS for Hardware Implementation of Data Encryption Standard
Salama, A., Aly, F., Nabil., M. (2006). Efficient Uses of FPGAS for Hardware Implementation of Data Encryption Standard. EKB Journal Management System, 5(5th International Conference on Electrical Engineering ICEENG 2006), 1-10. doi: 10.21608/iceeng.2006.33685
Aly E. Salama; Fawzy H. Aly; M. Nabil.. "Efficient Uses of FPGAS for Hardware Implementation of Data Encryption Standard". EKB Journal Management System, 5, 5th International Conference on Electrical Engineering ICEENG 2006, 2006, 1-10. doi: 10.21608/iceeng.2006.33685
Salama, A., Aly, F., Nabil., M. (2006). 'Efficient Uses of FPGAS for Hardware Implementation of Data Encryption Standard', EKB Journal Management System, 5(5th International Conference on Electrical Engineering ICEENG 2006), pp. 1-10. doi: 10.21608/iceeng.2006.33685
Salama, A., Aly, F., Nabil., M. Efficient Uses of FPGAS for Hardware Implementation of Data Encryption Standard. EKB Journal Management System, 2006; 5(5th International Conference on Electrical Engineering ICEENG 2006): 1-10. doi: 10.21608/iceeng.2006.33685

Efficient Uses of FPGAS for Hardware Implementation of Data Encryption Standard

The International Conference on Electrical Engineering
Article 78, Volume 5, 5th International Conference on Electrical Engineering ICEENG 2006, May 2006, Page 1-10  XML PDF (146.58 K)
Document Type: Original Article
DOI: 10.21608/iceeng.2006.33685
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Authors
Aly E. Salama1; Fawzy H. Aly2; M. Nabil.2
1Professor, Faculty Of Engineering, Cairo University, Giza, Egypt.
2Egyption Armed Forces.
Abstract
Abstract
In this work, a proposed pipeline implementation of Data Encryption Standard DES
algorithm on field programmable gate arrays (FPGAs) is introduced with multiple design
versions. All these versions are described in Electronic Code Book mode (ECB) using the
hardware description language VHDL (Very high speed integrated circuit hardware
description language). These versions have differences in the architecture and the techniques
that substitution boxes (S_BOXes) can be implemented. All these design were implemented
on devices from XILINX and we achieved speeds of up to 4.23 Gbits/s.
Besides, a comparative study is conducted between the proposed designs for DES
algorithm, another design for DES (Full Rolling) and the other previous implementations
based on many aspects as architecture, cost and performance.
Keywords
Cryptography; data encryption standard; electronic code book; field programmable gate array; substitution boxes and very high speed integrated circuit hardware description language; symmetric block cipher
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