FPGA implementation of the portable automatic testing system for digital circuits
El-Mahlawy, M., Abd El-Wahab, A., Ragab, A. (2008). FPGA implementation of the portable automatic testing system for digital circuits. EKB Journal Management System, 6(6th International Conference on Electrical Engineering ICEENG 2008), 1-24. doi: 10.21608/iceeng.2008.34333
Mohamed H. El-Mahlawy; Ahmed Abd El-Wahab; Al-Emam S. Ragab. "FPGA implementation of the portable automatic testing system for digital circuits". EKB Journal Management System, 6, 6th International Conference on Electrical Engineering ICEENG 2008, 2008, 1-24. doi: 10.21608/iceeng.2008.34333
El-Mahlawy, M., Abd El-Wahab, A., Ragab, A. (2008). 'FPGA implementation of the portable automatic testing system for digital circuits', EKB Journal Management System, 6(6th International Conference on Electrical Engineering ICEENG 2008), pp. 1-24. doi: 10.21608/iceeng.2008.34333
El-Mahlawy, M., Abd El-Wahab, A., Ragab, A. FPGA implementation of the portable automatic testing system for digital circuits. EKB Journal Management System, 2008; 6(6th International Conference on Electrical Engineering ICEENG 2008): 1-24. doi: 10.21608/iceeng.2008.34333

FPGA implementation of the portable automatic testing system for digital circuits

The International Conference on Electrical Engineering
Article 87, Volume 6, 6th International Conference on Electrical Engineering ICEENG 2008, May 2008, Page 1-24  XML PDF (1.13 MB)
Document Type: Original Article
DOI: 10.21608/iceeng.2008.34333
View on SCiNiTO View on SCiNiTO
Authors
Mohamed H. El-Mahlawy1; Ahmed Abd El-Wahab1; Al-Emam S. Ragab2
1Egyptian Armed Forces.
2Masr International University.
Abstract
Abstract:
The authors in paper [1] are presented the new automatic test equipment (ATE) for
digital integrated circuits based on the signature analysis. This work introduced a
complete framework for the testing of the printed circuit boards (PCBs) of the digital
integrated circuits. In this paper, the Field Programmable Gate Array (FPGA)
implementation of this new ATE is presented. The timing simulation and then design
download are presented on the Spartan Xilinx chip (X2S400EFT256-7). In this paper,
the concept of the portable ATE is presented that reduces the complexity of the
traditional ATE. This compacted testing system approach is designed to apply the test
pattern to the circuit under test (CUT) and to compact the response of the CUT by
signature analyzer. The timing controller and the parallel port of the personal computer
(PC) generate all required signals to control all steps of the test cycle for proper
operation.
Keywords
Automatic Test Equipment; and Testing of electronic circuits
Statistics
Article View: 100
PDF Download: 228