Design of Low Voltage 1st Order 3-Bit Quantizer SR ΔΣ Modulator Using SR Op-Amp | ||||
International Conference on Aerospace Sciences and Aviation Technology | ||||
Article 21, Volume 13, AEROSPACE SCIENCES & AVIATION TECHNOLOGY, ASAT- 13, May 26 – 28, 2009, May 2009, Page 1-9 PDF (430.81 K) | ||||
Document Type: Original Article | ||||
DOI: 10.21608/asat.2009.23498 | ||||
View on SCiNiTO | ||||
Authors | ||||
S. Kishk1; M. Abo-Elsoud2; A. Osman3 | ||||
1Dr., Electronics & comm. Eng. Dept., Faculty of Eng., Mansoura university. | ||||
2Prof., Electronics & comm. Eng. Dept., Faculty of Eng., Mansoura university. | ||||
3Researcher assistant, Electronics & comm. Eng. Dept., Faculty of Eng., Mansoura university. | ||||
Abstract | ||||
This paper presents a low power (LP) switched resistor (SR) ΔΣ modulator based on 3-bit dynamic quantizer. The proposed design offers lower noise compared to switched capacitor (SC) techniques due to reduction of the number of switches and capacitors. The modulator is designed in a 0.18 μm CMOS technology. The total power consumption is 17.4 mW , and signal to noise ratio (SNR)= 65.8 dB, using, over sampling ratio (OSR) = 64 and 3 V power supply. | ||||
Keywords | ||||
switched resistor; sigma delta modulator; analog to digital | ||||
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