FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)
Elsayed, G., Kayed, S. (2023). FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG). EKB Journal Management System, 5(1), 8-14. doi: 10.21608/jisse.2023.187871.1068
Ghada Elsayed; Somaya Ismail Kayed. "FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)". EKB Journal Management System, 5, 1, 2023, 8-14. doi: 10.21608/jisse.2023.187871.1068
Elsayed, G., Kayed, S. (2023). 'FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)', EKB Journal Management System, 5(1), pp. 8-14. doi: 10.21608/jisse.2023.187871.1068
Elsayed, G., Kayed, S. FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG). EKB Journal Management System, 2023; 5(1): 8-14. doi: 10.21608/jisse.2023.187871.1068

FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)

Journal of International Society for Science and Engineering
Volume 5, Issue 1, March 2023, Page 8-14  XML PDF (1.47 MB)
Document Type: Original Article
DOI: 10.21608/jisse.2023.187871.1068
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Authors
Ghada Elsayed email orcid 1; Somaya Ismail Kayedorcid 2
1Electrical Department, Faculty of Engineering, MTI University
2Department head, Obour Higher Institute for Engineering and Technology
Abstract
Randomness has been used as a seed for cryptographic algorithms and wireless communication protocols, and today, it is used as a tool or a feature in data preparation that maps input data to output data to make predictions in machine learning. Randomness importance is our research motivation. We introduce an efficient FPGA Design and Implementation for a mathematical calculation of the square root of irrational numbers. We adopted this Square Root Pseudo-Random Number Generator (SR-PRNG). This SR-PRNG is already designed, simulated, and tested for randomness. The advantage of FPGA implementation is to use it as a module in a modular design either in cryptographic applications or machine learning applications. We propose First Order Recursive Generation and Second-order Recurrence Generation design and FPGA implementation. We compare their utilizations for the target FPGA. The target FPGA is Xilinx Spartan 6 XC6SLX4-2CPG196. MATLAB HDL Coder is used for the design. The Maximum frequency is 244.499MHz for the two designs. The utilization of the second-order design versus the first-order design is 262 vs. 169 in the Number of Slice Registers, 368 vs. 207 in the Number of Slice LUTs, 227 vs. 133 in the Number of fully used LUT-FF pairs, 2 vs. 1 in the Number of Block RAM/FIFO, however, they are equal in the Number of bonded IOBs and the Number of BUFG/BUFGCTRL/BUFHCEs.
Keywords
PRNG; FPGA; MATLAB HDL CODER
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