SoC Verification Platforms Using HW Emulation and Co-modeling Testbench Technologies | ||||
The International Conference on Electrical Engineering | ||||
Article 76, Volume 9, 9th International Conference on Electrical Engineering ICEENG 2014, May 2014, Page 1-1 PDF (30.41 K) | ||||
Document Type: Original Article | ||||
DOI: 10.21608/iceeng.2014.30509 | ||||
View on SCiNiTO | ||||
Author | ||||
Mohamed Abdelsalam | ||||
Mentor Graphics, Egypt. | ||||
Abstract | ||||
High-performance, high-capacity hardware-assisted emulators and co-modeling test bench technology can speed up to 10,000x the verification of any embedded system. We will talk about the general concepts of functional verification using Emulators and show the variety of specialized H/W solutions that can be integrated to the emulator. Also, we will discuss the guidelines for crafting efficient virtual devices and how they can be used to create an SoC verification platform for testing SoC Design Under Tests (DUTs) on the HW emulator | ||||
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