Power minimization in CMOS RF mixers | ||||
| The International Conference on Electrical Engineering | ||||
| Article 72, Volume 6, 6th International Conference on Electrical Engineering ICEENG 2008, May 2008, Page 1-12 PDF (140.51 K) | ||||
| Document Type: Original Article | ||||
| DOI: 10.21608/iceeng.2008.34312 | ||||
 View on SCiNiTO | ||||
| Authors | ||||
| Ahmed ElDeib1; Roshdy A. AbdelRassoul2 | ||||
| 1Senior Member, IEEE., Modern Academy, Cairo, EGYPT. | ||||
| 2Senior Member, IEEE., Arab Academy for Science, Technology & Maritime Transport, Alexandria, EGYPT, 21937. | ||||
| Abstract | ||||
| Abstract: A new very low power RF mixer is introduced. The proposed mixer is based on two techniques: A CMOS transistor pair is applied to the four cross-coupled commutating transistor (the first technique), and current boosted technique, as described in the paper. The CMOS mixer is simulated in 0.8 μm CMOS technology. The mixer has an input signal of 0.2V and operates on a single 2.5V supply with transistor threshold voltages of 0.57V for all NMOS transistors and -0.52V for all PMOS transistors, and has a power dissipation of 2.3 mW. | ||||
| Keywords | ||||
| CMOS; RF; mixer; low power; current-boosted | ||||
|
Statistics Article View: 107 PDF Download: 166 |
||||
